The purpose of a phase locked loop (PLL) is to generate a frequency and phase-locked output oscillation signal. To achieve this goal, prior art essentially functioned ...

One of the most challenging tasks in analog circuit design is to adapt a functional block to ever new CMOS process technology. For digital circuits the number of gates per square mm approx. doubles ...

When Hackaday runs a contest, we see all manner of clever projects. But inevitably there are some we don’t see, because their builders didn’t manage to get them finished in time. [Park Frazer]’s phase ...

The HEF4046B is a phase-locked loop circuit that contains a linear voltage-controlled oscillator (VCO) and two discrete phase comparators that has a common signal input amplifier and a common ...

Radiation-hardened phase-locked loop (PLL) circuits represent a critical advancement in safeguarding electronic systems against the deleterious effects of ionising radiation. These circuits are ...

But taking a voltage-controlled oscillator at 100 MHz (nominal) and dividing its output by 100 will give you a signal you can lock to a 1 MHz crystal oscillator which is, of course, trivial to build.

A phase-locked loop (PLL) is a feedback system that combines a voltage-controlled oscillator (VCO) and a phase detector in such a way that the oscillator signal tracks an applied frequency or ...

I have always had a soft spot for phase-locked loops – at least, I have since I first found out what they were. What I like about them is that they servo into the best answer for a given situation – ...

Some brief theory and typical measurements of phase noise. Standard analysis of PLL phase noise used by most CAD applications. How to produce the lowest phase noise at a PLL output. A standard design ...

…which would take a pulse-width-modulated waveform at any frequency, and produce a signal with exactly the same mark/space ratio, but at a nominated frequency (see ‘Why might this be useful?’ below).